Simple IF Signal Generator 

Here is a versatile circuit of IF signal generator which may be of interest to radio hobbyists and professionals alike.Transistors T1 and T2 form an astable multivibrator oscillating in the audio frequency range of 1 to 2 kHz. RF oscillator is built around transistor T3. Here again a 455kHz ceramic filter/resonator is employed for obtaining stable IF. The AF from multivibrator is coupled from collector of transistor T2 to emitter of transistor T3 through capacitor C3. The tank circuit at collector of transistor T3 is formed using medium wave oscillator coil of transistor radio, a fixed 100pF capacitor C5 and half section of a gang capacitor (C6). 
The oscillator section may be easily modified for any other intermediate frequency by using ceramic filter or resonator of that frequency and by making appropriate changes in the tank circuit at collector of transistor T3. Slight adjustment of bias can be affected by varying values of resistors R6 and R7, if required

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DDS Function Generator

This is a new implementation of the AVR DDS signal generator v2.0, already published in scienceprog.com.  It is obvious that full credit for the original schematic and the firmware goes to its original creator. Presented here is a different PCB that is compact, single sided with only through-hole components for easy construction. 

● Parts list

Part	Value
R1	470 Ω ½W 5%
R2	10 ΚΩ ¼W 5%
R3	100 ΚΩ ¼W 1%
R4	20 ΚΩ ¼W 1%
R5	20 ΚΩ ¼W 1%
R6	10 ΚΩ ¼W 1%
R7	20 ΚΩ ¼W 1%
R8	10 ΚΩ ¼W 1%
R9	20 ΚΩ ¼W 1%
R10	10 ΚΩ ¼W 1%
R11	20 ΚΩ ¼W 1%
R12	10 ΚΩ ¼W 1%
R13	20 ΚΩ ¼W 1%
R14	10 ΚΩ ¼W 1%
R15	20 ΚΩ ¼W 1%
R16	10 ΚΩ ¼W 1%
R17	20 ΚΩ ¼W 1%
R18	10 ΚΩ ¼W 1%
R19	20 ΚΩ ¼W 1%
R20	100 Ω ¼W 5%
R21	100 ΚΩ ¼W 1%
R22	12 ΚΩ ¼W 1%
R23	150 Ω ¼W 5%
POT1	1 ΚΩ linear potentiometer
POT2	47 KΩ linear potentiometer
POT3	10 ΚΩ trimmer
C1	100 nF MKT/polyester
C2	100 nF MKT/polyester
C3	18 pF ceramic
C4	18 pF ceramic
Q1	16 MHz crystal
IC1	ATMEL ATMEGA16P
IC2	LM358N
BNC1 – BNC2	BNC female connector
S1 – S6	Push button
LCD Header	Female header 16 pin for LCD
LCD Module	HD44780-based 2×16 character LCD
ISP	Male header 2x3 for ISP
POWER	Female header 4-pin for power as follows : PIN1 : +12V PIN2 : -12V PIN3 : GND PIN4 : +5V
LED1	3 mm green led
ON/OFF	Miniature on/off switch

● Power supply

For powering up the function generator, a PC ATX power supply unit was used, where all voltages are already available (+12V, -12V, +5V). The wiring is shown in the following image, taken from scienceprog.com.

● PCB Making-of

for making of pcb video click here

Programming of the ATMEGA16 with usbtiny programmer 

The device firmware can be downloaded here :

● Changes in firmware

Because of the present LCD character orientation, which is different from the original implementation (180 degrees), the following changes in main.c were made :

Buttons LEFT and RIGHT were reversed :

#define LEFT 3//PORTD

#define RIGHT 1//PORTD

Buttons TOP and BOTTOM were reversed :

#define DOWN 4//PORTD

#define UP 0//PORTD

For the latest version of AVR-GCC compiler, the following changes should be made (according to Geoff comment on scienceprog.com) :

struct signal{

volatile uint8_t mode; //signal

volatile uint8_t fr1; //Frequency [0..7]

volatile uint8_t fr2; //Frequency [8..15]

volatile uint8_t fr3; //Frequency [16..31]

volatile uint32_t freq; //frequency value

volatile uint8_t flag; //if “0″generator is OFF, “1″ – ON

volatile uint32_t acc; //accumulator

volatile uint8_t ON;

volatile uint8_t HSfreq; //high speed frequency [1...4Mhz]

volatile uint32_t deltafreq; //frequency step value

}SG;

The ATMEGA16 fuses should be :

HIGH = 0×59

LOW = 0xCF

This is interpreted to the following options checked (all others unchecked) :

OCDEN

SPIEN

BOOTSZ1

BOOTSZ2

SUT1

SUT0

Testing 

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PC based Frequency Meter  

Here is a simple technique for measuring frequencies over quite a wide frequency range and with acceptable accuracy limits using a PC. It follows the basic technique of measuring low frequencies, i.e. at low frequency, period is measured for a complete wave and frequency is calculated from the measured time-period. Cascaded binary counters are used for converting the high-frequency signals into low-frequency signals. The parallel port of a computer is used for data input from binary counters. This data is used for measuring time and calculating the frequency of the signal. The block diagram shows the basic connections of the counters and parallel port pin numbers on 25-pin �D� connector of a PC (control register 379 Hex is used for input). External hardware is used only for converting the higher frequency signals into low frequency signals.

Thus, the major role in frequency-measurement is played by the software. The PC generates a time-interrupt at a frequency of 18.21 Hz, i.e. after every 54.92 millisecond. Software uses this time-interrupt as a time-reference. The control register of the PC�s parallel port is read and the data is stored continuously in an array for approximately 54.9 ms using a loop. This stored data is then analysed bit-wise. Initially, the higher-order bit (MSB or the seventh-bit) of every array element is scanned for the presence of a complete square wave. If it is found, its time period is measured and if not then the second-highest order bit (sixth bit) is scanned. This operation is performed till the third bit and if no full square wave is still found, an error message is generated which indicates that either there is an error in reading or the frequency signal is lower than 19 Hz. Lower three bits of the control register are not used.

When a wave is found, along with its time-period and frequency components, its measurement precision in percentage is also calculated and displayed. Number of data taken in 54.9 ms is also displayed. As stated above, the lower starting range is about 19 Hz. Data is read for approximately 54.9 ms. Thus, the lowest possible frequency that can be measured is 1/.0549 Hz. Lower range depends only on the sampling time and is practically fixed at 19 Hz (18.2 Hz, to be precise). Upper range depends on factors such as value of the MOD counter used and the operating frequency range of the counter IC. If MOD-N counter is used (where N is an integer), upper limit (UL) of frequency is given by UL=19xN5 Hz. Thus for MOD 16 counters UL@20 MHz, and for MOD 10 counters UL@1.9 MHz. Care should be taken to ensure that this upper limit is within the operating frequency range of counter IC used.

Precision of measurement is a machine-dependent parameter. High-speed machines will have better precision compared to others. Basically, precision depends directly upon the

 

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Simple Analog to Digital Converter

Normally analogue-to-digital con-verter (ADC) needs interfacing through a microprocessor to convert analogue data into digital format. This requires hardware and necessary software, resulting in increased complexity and hence the total cost.

The circuit of A-to-D converter shown here is configured around ADC 0808, avoiding the use of a microprocessor. The ADC 0808 is an 8-bit A-to-D converter, having data lines D0-D7. It works on the principle of successive approximation. It has a total of eight analogue input channels, out of which any one can be selected using address lines A, B and C. Here, in this case, input channel IN0 is selected by grounding A, B and C address lines.
Usually the control signals EOC (end of conversion), SC (start conversion), ALE (address latch enable) and OE (output enable) are interfaced by means of a microprocessor. However, the circuit shown here is built to operate in its continuous mode without using any microprocessor. Therefore the input control signals ALE and OE, being active-high, are tied to Vcc (+5 volts). The input control signal SC, being active-low, initiates start of conversion at falling edge of the pulse, whereas the output signal EOC becomes high after completion of digitisation. This EOC output is coupled to SC input, where falling edge of EOC output acts as SC input to direct the ADC to start the conversion.
As the conversion starts, EOC signal goes high. At next clock pulse EOC output again goes low, and hence SC is enabled to start the next conversion. Thus, it provides continuous 8-bit digital output corresponding to instantaneous value of analogue input. The maximum level of analogue input voltage should be appropriately scaled down below positive reference (+5V) level.
The ADC 0808 IC requires clock signal of typically 550 kHz, which can be easily derived from an astable multivibrator constructed using 7404 inverter gates. In order to visualise the digital output, the row of eight LEDs (LED1 through LED8) have been used, wherein each LED is connected to respective data lines D0 through D7. Since ADC works in the continuous mode, it displays digital output as soon as analogue input is applied. The decimal equivalent digital 

output value D for a given analogue input voltage Vin can be calculated from the relationship

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